Microprocessor Question Bank For End SEM Exam: SE SEM II Computer Engineering Pattern 2019

 Unit III : Memory Management
 
1. Page Translation Process in 80386

2. General Selector Format 

3. What is a Logical address, Linear address and Physical address? 

4. Explain the use of following instructions in detail      

i) SGDT ii) LIDT iii) SLDT 

5. Explain the Segment Translation Process with a neat diagram of 80386 

6. Enlist various types of system and non-system descriptors in the 80386. Explain their use in brief. 

7. With the necessary flowchart, explain the complete address translation process in 80386. 

8. Draw and explain the general descriptor format available in various descriptor tables. 

9. Differentiate and explain GDTR, LDTR, and IDTR.
 
UNIT IV: Protection 

1. Write a short note on CPL, DPL, and RPL 

2. Explore the role of various fields in Page Level Protection. 

3. List and explain various Privilege Instructions

4. What is call gate? Explain how it is used in calling functions with higher privilege levels. 

5. Define the functions of Type Checking and Limit Checking in protection. 

6. Explain different levels of protection? State the rules of protection check. 

7. Explore five aspects of protection applied in segmentation. 

8. What is DPL, EPL and IOPL? Explain in brief. 

9. Explore the need for a protection mechanism in 80386. 

10. Explain how control transfer instructions are executed using the call gate in the system? 

11. List and explain various Privilege Instructions. 

12. Elaborate on the concept of combining segment protection and page level protection in 80386.
 
UNIT V: Multitasking and Virtual 8086 Mode 

1. Explore the role of Task Register in multitasking and the instructions used to modify and read Task Register. 

2. Draw and Explain the Task State Segment of 80386. 

3. Difference between Real Mode and Virtual 8086 Mode.

 4. Explain the TSS descriptor of 80386 with a neat diagram. 

5. Explore memory management in the Virtual 8086 Mode.

 6. List and explain various features of virtual 8086 Mode.

7. Explain the structure of a V86 Task in detail. How is protection provided within the V86 task. 

8. With the necessary diagram, explain entering and leaving the virtual mode of 80386. 

9. Explain the TSS descriptor and its role in multitasking.

 10. Define Task Switching and explain the steps involved in task switching operation?
 
UNIT VI: Interrupts, Exceptions, and Introduction to Microcontrollers

 1. Explain the process of Enabling and Disabling Interrupts in 80386. 

2. Differentiate and Explain the Interrupt gate and Trap gate descriptor. 

3. Differentiate between Microprocessor and Microcontroller. 

4. With the help of the necessary diagram, explain the structure of IDT in 80386. 

5. Explain different types of exceptions in 80386 with suitable examples. 

6. Draw and Explain the Architecture of a Typical Microcontroller. 

7. How interrupts are handled in protected mode? Explain with the help of a neat diagram. 

8. Elaborate about enabling and disabling interrupts in 80386. 

9. List and elaborate on different applications of microcontrollers. 

10. Explain the following exceptions in brief.        

i) Divide error   ii) Invalid Opcode   iii) Overflow 

11. Explain various features of the 8051 Microcontroller. 

12. Explain the following exception conditions with an example: Faults, Traps, and Aborts.